Power Tuning Module PCB Board Redesign
It is true that Power Tuning Module PCB Board Redesign may inject a small amount of digital noise onto the analog ground plane. These currents should be quite small, and can be minimized by ensuring that the converter output does not drive a large fanout (they normally can’t, by design).
Minimizing the fanout (which, in turn, means lower currents) on the converter’s digital port will also keep the converter logic transitions relatively free from ringing and minimize digital switching currents, and thereby reducing any potential coupling into the analog port of the converter.
The logic supply pin (VD) can be further isolated from the analog supply by the insertion of a small lossy ferrite bead as shown in below Figure. The internal transient digital currents of the converter will flow in the small loop from VD through the decoupling capacitor and to DGND (this path is shown with a heavy line on the diagram).
The transient digital currents will therefore not appear on the external analog ground plane, but are confined to the loop. The VD pin decoupling capacitor should be mounted as close to the converter as possible to minimize parasitic inductance. These decoupling capacitors should be low inductance ceramic types, typically between 0.01 µF and 0.1 µF.
Again, not one grounding scheme will be appropriate for all applications in the process of Power Tuning Module PCB Board Redesign. But by understanding the options and planning ahead problems will be minimized.
The name “DGND” on an IC tells us that this pin connects to the digital ground of the IC. This does not imply that this pin must be connected to the digital ground of the system. It could correctly be referred to as “Digital Return.”