LVDS is a high-speed, low-voltage, low-power, and low-noise general-purpose I/O interface standard. The low voltage swing and differential current mode output significantly reduces electromagnetic interference (EMI). These outputs have faster edge rates, allowing the signal path to function as a transmission line. Therefore, LVDS System Circuit Board Gerber File Copying and differential signaling theory are useful for reverse engineering pc boards that incorporate Altera FPGAs and integrate LVDS. In addition, when cloning an LVDS circuit board’s design file, there are various factors to consider such as differential traces, impedance matching, crosstalk, and EMI.
Since it is a high-speed LVDS pcb board cloning, impedance design and matching is very important, even for very short turns. Any discontinuity in differential LVDS traces can cause signal reflections that degrade signal quality. These discontinuities increase common-mode noise, which is radiated in the form of EMI. LVDS outputs in current mode and needs matching resistors to achieve closed loop, and can’t work without resistor matching.
This matching resistor value (RT) is chosen to match the differential impedance of the transmission line, between 90Ω and 110Ω (typically 100Ω). Below Figure shows the proper application of matched resistors.
The following guidelines should be followed when choosing termination resistors for LVDS channels. Place matching resistors at the far end of the transmitter differential interconnect. A 100Ω resistor can be used. Use surface mount film 0603 or 0805 chip resistors. Install matching resistors within 7 mm of the receiver, as close to the receiver as possible.
To reduce crosstalk between LVDS and single-ended signals such as LVTTL, SSTL-3, SSTL-2, and similar standards, differential LVDS signals must be isolated from single-ended signals. If the LVDS and single-ended signals are not far enough apart from each other, the single-ended signals may cause some interference to the differential pair.