MOS shortens the circuitry delay of the board, which is the basic condition to Clone PCB Board Conductor Loss, and the shorter the length of the wires, the better.
Reducing the wire delay time usually adopts two methods: wire material length and length. The delay time per unit length is proportional to the square root of the substrate material’s electric induction rate.
It is assumed that the substrate material’s electric induction rate is reduced by 50% and the delay time is only 0.7 times. In recent years, due to advances in process micro-technology, wire density has been continuously improved.
Clone PCB Board Conductor Loss
The potential concern of the relative wire detailing “Clone PCB Board Conductor Loss” is also gradually surfaced. The impedance of the wire pattern is inversely proportional to the cross-sectional area of the wire and increases in proportion to the length of the wire, that is, if the ratio is reduced, the overall impedance of the wire is inversely proportional to the length. When LSI is compared with a wire, the internal impedance of the LSI is much larger than that of the wire.
Therefore, the influence of the conductor loss of the LSI occurs earlier than the wire. The main reason for the change of the internal conductor of the LSI from Al to Cu is that the impedance of Cu is 60% of that of Al. Therefore, it is desirable to reduce the loss of the conductor by the change of the material, and if the board is When the wire is regarded as an LC line, it is necessary to treat the LSI internal wire as an RC line.
The conductor loss of a typical circuit board is not significant. Similar to the MCM (Multi Chip Module) using a fine wire pattern, even if the wire length is very short, it is impossible to get rid of the nightmare of Clone PCB Board Conductor Loss.
